1. Field of the Invention
This invention relates to a data processor suitable for fabrication in integrated circuit form, and more particularly to an I/O (Input/Output) processor for carrying out processing of data transferred between a CPU and input/output medium.
2. Description of the Prior Art
Recently, with the development of memory media, such as magnetic disc, magnetic drum and magnetic tape, many improvements in I/O processors have been made.
The I/O processor carries out processing of data transferred between a central processing unit (CPU) and a memory medium or a transmission line. Its functions include, for instance, (1) series-parallel conversion of input data, (2) examination of distinctive identifying code signals accompanying input data, (3) buffering of input data, (4) cyclic redundancy check (check of errors) of input data, (5) buffering of output data (received from CPU), (6) parallel-series conversion of output data, (7) production of identifying code signals added to output data, (8) production of cyclic redundancy check codes added to output data, (9) control of the data memory medium ("seek" of the head, leading of the Head, and the like, when the data memory medium is for instance a magnetic disc), (10) synchronization of driving clock signals for input data. The processing speed required for data transfer by the I/O processor is to a very large extent dependent on the capacity of the data memory medium as regards read-out/write-in speed. For example, in the case of magnetic disc, a processing capacity of at least 250 K bit/sec or more is required. But in the case of the magnetic disc, single bit information generally appears on the disc medium as two bits, that is to say a "clock bit" and a "data bit", and even if the speed of the I/O processor as such is to be 250 K bits/sec, the fact is that in practice the processing capacity required is a speed of 500 K bit/sec. Moreover, the bit interval of the input data fluctuates. The main reasons for this are non-uniformity of rotation in the case of a magnetic disc, and mutual interference between the recorded bits on the medium, and the like. The fluctuation is as much as .+-.25%, and in the foregoing example, also, when the standard interval is 2 .mu.sec the minimum interval becomes 1.5 .mu.sec. Therefore, the I/O processor must be capable of following such speed fluctuations.
In known processing equipment, in view of the above requirements, and more particularly in regard to processing speed, small scale integrated circuit devices consisting of relatively high-speed bipolar transistors or groups thereof are used in the circuit elements making up the processing unit. That is to say, specialized circuit groups respectively corresponding directly to the various functions set forth in the foregoing items (1) to (10) are combined forming the I/O processor.
Now, with the progress in large scale integrated circuit (hereinafter referred to as LSI) technology in recent years, the possibility has arisen that even the high-speed data processing equipment with which the present invention is concerned can be integrated on a single LSI chip. As regards making this data processor in LSI form, the following two problematical points are to be considered.
(1) Problem regarding the speed of the elements
Practical processors for performing advanced logical operational functions which include all of the various functions set forth in the foregoing items (1) to (10) must have a high integration density, and for this purpose integrated circuits with MOS structure are more suitable than those with bipolar structure. But the properties of MOS transistors present a difficulty in that their speed of transmission of signals is inferior to that of bipolar transistors. This is closely related to the areas of the elements themselves and therefore a straightforward comparison is difficult, but for instance the delay for one gate stage is about 1 to 10 ns in the case of bipolars, whereas it is 10 to 100 ns in the case of MOS. One may conclude therefore that there is a difference amounting to about 1 to 2 decimal places. Accordingly, for the purpose of carrying out high-speed data processing with a data processor in the form of an integrated circuit with MOS structure, the structure of the processor must be considered in itself.
(II) Problems regarding the circuit structure of the processor
In designing LSI it is of course highly advisable to select a circuit structure with high integration efficiency. But if a data processor which is a combination of specialized circuit groups directly corresponding to the various functions set forth in the foregoing items (1) to (10), is formed as an integrated circuit device while remaining otherwise unchanged, it is quite certain that this is not very advisable, at least from the point of view of integration efficiency, for instance because of the random nature of the circuit structure and because high-frequency pulses are needed for each circuit.